POWER ELECTRONICS / INTERACTIVE LABUniversity of Vigo
RECTIFIERS / SINGLE-PHASE FULL WAVE

Single-phase full-wave uncontrolled bridge rectifier

Use both half-cycles. Keep the load polarity. Explore the four-diode bridge after the half-wave rectifier. Follow the conducting diode pair, compare R and RL loads, add nonideal diode drops or an opposing DC voltage, and then study capacitor filtering and source-current harmonics.

Four-diode bridgeLinked waveformsPeriodic steady state
Learning level

Begin with the bridge and ideal diodes; later levels add nonidealities, energy flow, stresses and harmonic analysis.

FOUR-DIODE BRIDGE

Which diode pair conducts now?

The bridge reverses the source connection every half-cycle so that load current keeps the same reference direction.

linked state

θ = 45°
D1–D2 conduct

Mean output voltage—over one source period
Mean load current—positive load reference
Output RMS—RMS
Load-current RMS—RMS

Source and output voltage

V
vsvo

The bridge keeps the output polarity positive while the source changes sign.

Load and source current

A
iois

The load current keeps its direction; the source current changes sign with the conducting bridge pair.

What to notice now

For an ideal resistive load, the output is |v_s| and repeats twice per source period. The source current remains alternating even though the load current is unidirectional.

Guided investigations

01

Predict the second half-cycle

At θ = 225°, predict the signs of v_s, v_o, i_o and i_s, and which diode pair conducts.

Reveal the explanation
The source is negative, but D3–D4 reverse its connection to the load. Therefore v_o and i_o remain positive while i_s is negative.
02

Compare R and RL

Select RL and increase L. Predict what changes strongly and what remains imposed by the bridge.

Reveal the explanation
Inductance smooths i_o. With an ideal bridge and E = 0, v_o still follows |v_s|; the bridge pair commutates each half-cycle.

03

Count the diode drops

Enable V_F and compare the output with the half-wave circuit. How many forward drops are in the active bridge path?

Reveal the explanation
A bridge source path contains two conducting diodes, so the available rectified source voltage is |v_s| − 2V_F while that pair conducts.
04

Add a capacitor filter

Choose R‖C and increase C. Predict the output-ripple frequency and the change in source-current pulses.

Reveal the explanation
The capacitor is refreshed near both source-voltage peaks, so ripple occurs mainly at 2f. Larger C reduces voltage ripple but concentrates source current into shorter charging intervals.

Ripple and conduction

Voltage ripple factor—
Current ripple factor—
Bridge conduction fraction—
Output peak-to-peak ripple—

Bridge diode losses

Total conduction loss—
Conversion efficiency—
Pair peak current—
Per-diode average current—
Model and equations

For R/RL/RLE, the bridge delivers a rectified source through two diodes. When current is zero, conduction starts only when the available rectified source exceeds E.

vr(t) = |Vm sin(ωt)| − 2VF
conducting series load: Ldio/dt + Rio + E = vr

For R‖C, the capacitor charges when the available bridge voltage exceeds its present voltage and otherwise discharges through R. The ideal source and zero source impedance make the charging-current peaks intentionally idealized.

Instantaneous power

W
pspo

With ideal bridge diodes, source and load active powers agree in steady state.

Diode-pair currents

A
D1–D2D3–D4

Each pair conducts on alternate source half-cycles whenever the bridge is supplying the load.

Power and source utilization

Mean output power—
Mean source power—
True source power factor—
Source-current RMS—

Per-diode electrical stress

RMS current—
Ideal-bridge reverse-voltage reference—
Conduction duty—
Loss in each conducting pair—
Operating waveform stress is not a safe component rating. Design requires margin and real-device data, including recovery, thermal behavior and source inductance.

SOURCE CURRENT

Harmonic spectrum

The source current is alternating even though the load current is rectified. Capacitor filtering can strongly increase current distortion.

Bars show RMS values of source-current harmonics relative to the source frequency; DC is reported separately.

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—
—

THDi=Irms2−I1,rms2I1,rms

Bridge versus center-tapped full wave

  • Bridge: four diodes, two conduct at a time.
  • Center-tapped: two diodes, one conducts at a time, but it needs a center-tapped secondary.
  • For the same defined source winding voltage, diode reverse-voltage requirements differ; always state the voltage reference before comparing.

What changed from half wave?

  • Both source half-cycles transfer energy to the load.
  • The ideal resistive output average rises from V_m/π to 2V_m/π.
  • Output ripple repeats at 2f rather than f.
  • Source current remains AC and changes sign every half-cycle.
Definitions, conventions, and scope

Source reference: v_s = V_m sin(ωt). Positive load current enters the positive output terminal. D1–D2 conduct for positive source polarity; D3–D4 conduct for negative source polarity. All averages are over one source period.

The capacitor-filter model omits E and L. The series-load model omits C. The source has zero internal impedance and zero commutation inductance, so commutation is instantaneous and capacitor charging peaks are idealized.

Diode forward voltage is constant when enabled. Reverse recovery, switching losses, temperature dependence, transformer copper/core loss and source impedance are not modeled.

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