Three-phase half-wave uncontrolled rectifier

THREE DIODES · COMMON CATHODES

Which phase supplies the load now?

A conducting diode connects the highest phase voltage to the positive output. The return conductor is the source neutral N.

Probe angle

Mean output voltage—over one source period

Mean output current—into the complete load

Output-voltage RMS—includes the DC component

Output-current RMS—into the complete load

Phase and output voltages

v_ov_Uv_Vv_W

Phase voltages use neutral N as reference. The solid output trace is not a line-to-line voltage. Click a plot to move the shared cursor.

Output and phase-U currents

i_oi_U

i_o flows into the complete load; i_U flows only through D₁. The neutral return is i_N = i_o.

What to notice now

Selection windows are not always conduction intervals

With positive U–V–W sequence, D₁ has the highest phase from 30° to 150°, D₂ from 150° to 270°, and D₃ from 270° to 390° (across 360°). With an opposing voltage or a capacitor, the selected diode can still be blocked.

Why this circuit needs a neutral

This is a four-wire connection. Each phase current is unidirectional, with a positive mean when power is transferred. Their sum returns through N. Do not apply the zero-neutral-current rule for balanced sinusoidal loads to these rectified currents.

Guided investigations

01 · PREDICT → TEST → EXPLAIN

Predict the conducting phase

Start with ideal R. At 210°, which phase is highest? Predict the signs of i_o, i_U, and i_N before loading the test case.

Reveal the explanation

Phase V is highest, so D₂ conducts. The output and neutral-return currents are positive, but the phase-U current is zero. A negative phase-U voltage does not reverse current through D₁: D₁ blocks.

02 · PREDICT → TEST → EXPLAIN

Why 120°, not 180°?

In the ideal R case, phase U is still positive at 151°. Predict whether D₁ is still conducting. Compare the cursor immediately before and after 150°.

Reveal the explanation

D₁ turns off because phase V becomes higher, not because phase U becomes negative. Positive phase voltage alone is not sufficient. With ideal continuous conduction, each diode occupies only its 120° highest-phase window.

03 · PREDICT → TEST → EXPLAIN

Smooth current without smoothing voltage

Prepare the ideal RL case and keep V_m, f, and R fixed. Predict the effect of changing L from 0 to 350 mH on mean current, current ripple, and output voltage.

Reveal the explanation

The inductor stores and releases energy, reducing current ripple. The average current stays V_o,dc/R, because the mean inductor voltage is zero. The three-pulse output voltage remains imposed by the source, and the neutral still carries the output current.

04 · PREDICT → TEST → EXPLAIN

Do three balanced phases cancel?

Use ideal R and look at 90°, 210°, and 330°. Predict the neutral-return current at each angle. Does its mean vanish?

Reveal the explanation

The phase currents are pulses of the same sign. Their shifted sum is the output current, not zero. Each phase has mean I_o,dc/3; the neutral has mean I_o,dc with the return reference shown. Balanced voltages do not remove this DC component.

05 · PREDICT → TEST → EXPLAIN

Count one diode drop

Prepare ideal R at V_m = 20 V. Predict the mean-voltage change when you enable a 1 V diode drop. Compare the path with a single-phase bridge.

Reveal the explanation

Only one diode conducts in the active source path. In this prepared case, conduction remains continuous, so the mean output falls by 1 V. A four-diode single-phase bridge has two series diode drops in its active path.

06 · PREDICT → TEST → EXPLAIN

Highest phase, but no current?

Prepare an RLE load with E = 280 V. Predict what happens as E rises above the 325 V phase peak. Watch both current and voltage during blocked intervals.

Reveal the explanation

At 280 V the current is discontinuous for the prepared settings. When E reaches the available phase peak minus the diode drop, no positive steady-state current can start. During blocking, the output is E. Inductance can extend an existing pulse, but cannot sustain periodic power transfer when the source can never overcome E.

07 · PREDICT → TEST → EXPLAIN

Smoother voltage, sharper source current

Prepare R‖C. Predict the effect of increasing C on voltage ripple and source-current peaks. Then move just after 90°: can D₁ conduct while the capacitor discharges?

Reveal the explanation

Larger C reduces voltage ripple but concentrates replenishment into shorter intervals. Immediately after a peak, i_C can be negative while i_o remains positive: the source and capacitor then supply the resistor together. Turn-off occurs at i_o = 0, not at i_C = 0. The repetition frequency remains 3f for this balanced periodic circuit.

Phase/diode currents and neutral return

i_Ui_Vi_Wi_N

Each phase current is also its diode current: i_D1 = i_U; i_D2 = i_V; i_D3 = i_W. Three shifted pulses do not cancel: with the drawn return reference, i_N = i_U + i_V + i_W. The wider teal dotted trace is the neutral return; it coincides with the current of the conducting phase.

Capacitor and resistor currents

i_Ci_R

i_C > 0 means charging; i_C < 0 means discharging. A diode may still conduct just after the voltage peak while the capacitor is already discharging.

Ripple and conduction

Voltage ripple factor	—
Load-resistor current ripple factor	—
Output peak-to-peak ripple	—
Output repetition frequency	—
Fraction of the period with conduction	—
Conduction fraction per diode	—

Ripple factor = RMS of the AC part / magnitude of the mean. A perfectly constant nonzero output has zero ripple; a zero mean makes the ratio undefined.

Model and equations

During series-load conduction, the selected phase supplies the resistor, inductor, and opposing DC source of voltage E through one diode. From zero current, turn-on requires the highest phase voltage to exceed E + V_F. Inductive current can continue after that inequality stops being true. Set L = 0 for R or RE; E = 0 when the opposing source is disabled.

L \frac{d i_{o}}{d t} + R i_{o} + E = v_{o}

v_{o} = \max (v_{U}, v_{V}, v_{W}) - V_{F}

With all diodes blocked: i_o = 0. For a series load, v_o = E; for R‖C, the capacitor sets v_o and discharges through the resistor.

Useful ideal-load results

These voltage results apply to ideal diodes, R or RL, E = 0, and no capacitor. V_m is the phase-to-neutral peak, not the line-to-line RMS.

Mean voltage: average one 120° lobe and repeat it three times.

V_{o,dc} = \frac{3}{2 π} \int_{\frac{π}{6}}^{\frac{5 π}{6}} V_{m} \sin (θ) d θ = \frac{3 \sqrt{3}}{2 π} V_{m}

V_{o,dc} \approx 0.827 V_{m} \approx 1.170 V_{ph,rms} \approx 0.675 V_{LL,rms}

V_{o,rms} = V_{m} \sqrt{\frac{1}{2} + \frac{3 \sqrt{3}}{8 π}} \approx 0.841 V_{m}

In periodic steady state, the inductor has zero mean voltage, so I_o,dc = (V_o,dc − E)/R for a series load, including discontinuous conduction. This does not make its instantaneous voltage zero.

Instantaneous power

p_sp_op_L/C

p_s is the sum of the three phase powers; p_o enters the complete load. Positive storage power means energy is increasing in the inductor or capacitor.

Voltage across D₁

v_D1

v_D1 = v_U − v_o, measured from anode to cathode. A negative value is reverse voltage.

Power and source utilization

Total active input power	—
Mean power into the load	—
Total diode conduction loss	—
Source power factor PF	—
Displacement power factor	—
Current distortion factor	—
Conversion efficiency	—
Phase-current RMS	—

For this balanced sinusoidal source, PF = cos(φ₁) × (I_1,rms/I_ph,rms). The first factor describes fundamental displacement; the second uses total phase-current RMS, including its DC component. These factors are undefined when the required current denominator is zero.

Only the enabled constant diode drop dissipates converter power. The ideal-source model omits real switching, transformer, and wiring losses.

Electrical stress per diode

Average current	—
RMS current	—
Peak current	—
Operating peak reverse voltage	—

Without a capacitor, with ideal diodes and E = 0, the peak reverse voltage is √3 V_m. A capacitor or a high opposing voltage can increase the actual reverse stress. The displayed value is calculated from the selected operating waveform, not a safe device rating.

PF compares total active input power with the sum of the three phase apparent powers. Balanced phase voltages do not imply sinusoidal phase currents or PF = 1, even with a resistor load.

PF = \frac{P_{in}}{3 V_{ph,rms} I_{ph,rms}}

A phase current contains DC and harmonics

Bars 1–25 show RMS harmonic components of phase U; the DC bar shows its mean. These are not the output-ripple harmonics. The distortion metrics include all harmonic orders through the total RMS, not just the displayed bars.

Mean phase current (DC)	—
Fundamental-current RMS	—
Source-current THD — DC excluded	—
Source-current THD — DC included	—

Here the analyzed current is source phase U, i_U, over one source period. The balanced phases have identical ratios. The formula quantities are phase-current RMS, signed mean, and fundamental RMS. Both ratios use the fundamental-current RMS as denominator, never total RMS. DC excluded removes the mean-current contribution only from the numerator; DC included retains it. The readouts are percentages (100 × the ratio); exports retain dimensionless ratios unless explicitly labeled %. Both are undefined when the fundamental is zero. The rectifier values use the complete source-current waveform, including capacitor charging current, independently of the number of spectrum bars displayed.

{THD}_{i, DC excl.} = \frac{\sqrt{{I_{ph,rms}}^{2} - {I_{ph,dc}}^{2} - {I_{1,rms}}^{2}}}{I_{1,rms}}

{THD}_{i, DC incl.} = \frac{\sqrt{{I_{ph,rms}}^{2} - {I_{1,rms}}^{2}}}{I_{1,rms}}

Connect this to the other rectifiers

Reference comparison only: ideal diodes, no capacitor, E = 0. The other topologies are not simulated here. For the single-phase bridge, V_m is its complete input peak; for both three-phase circuits, it is the phase-to-neutral peak. The available source systems are therefore different.

Single-phase full-wave bridge	4 / 2	(2/π ≈ 0.637) `V`_m	2`f`
Three-phase half wave + N	3 / 1	(3√3/(2π) ≈ 0.827) `V`_m	3`f`
Three-phase full-wave bridge	6 / 2	(3√3/π ≈ 1.654) `V`_m	6`f`

The three-phase bridge uses six diodes and no load-neutral return. It selects both the highest and lowest phases; this three-diode circuit selects only the highest and returns through N.

Conventions, limitations, and references

U, V, W are upright phase terminal names; italic R is resistance. Phase-current subscripts U, V, W identify source phases; subscript R identifies the load resistor. With R‖C, i_R = v_o/R and the complete rectifier output current is i_o = i_R + i_C. The main current cards and current ripple factor refer to the resistor branch; a separate RMS readout includes capacitor current. With a series load, the output and resistor currents coincide. All means and RMS values refer to one complete source period. Output and neutral current are positive toward the load and back to N, respectively. At ideal commutation, the display uses the right-hand limit, with no finite overlap interval.

v_{U} = V_{m} \sin (θ)

v_{V} = V_{m} \sin (θ - \frac{2 π}{3})

v_{W} = V_{m} \sin (θ - \frac{4 π}{3})

θ = ω t, ω = 2 π f

The model assumes a balanced sinusoidal voltage source with an accessible neutral and zero source impedance. It excludes startup, source or transformer inductance, overlap, leakage, reverse recovery, switching loss, parasitic capacitance, temperature, transformer losses, and magnetic saturation. The DC in individual phase currents matters for transformer design, which is not modeled. Never use the ideal charging-current peaks or diode stresses as component ratings.

The curves represent periodic steady state, not a transient after each slider change. Piecewise analytical solutions and bracketed switching events are integrated with event-split Gaussian quadrature. Before displaying results, the model checks Kirchhoff laws, the independent inductor and capacitor derivative laws, conducting/blocked diode conditions, and power/periodic-energy balances. Ripple factors are evaluated directly from deviations about the corresponding mean; stored-energy states are checked for continuity at switching.

CSV uses SI base units and a decimal point. The grid is event-enhanced, not uniformly sampled; equal angles with limit_side values left and right describe jumps. output_current_A includes capacitor current; resistor_current_A does not. Technical provenance and parameter metadata precede the waveform table. Existing phase column names retain R, S, T for compatibility; the displayed mapping is R→U, S→V, T→W. Parameter names and waveform values are unchanged. Separate result rows record resistor-current mean and RMS. The existing technical field result_phase_current_nonfundamental_including_dc_ratio is the DC-included source-current THD shown here; its definition and values are unchanged. Both distortion fields are dimensionless ratios, not percentages; both use phase fundamental RMS as denominator.

Optional technical references

Background topology and ideal-load formulas: MPS, “Uncontrolled Rectifiers”; M. R. Al-ghazaly, “Power Electronic, Lecture 1,” Al-Mustaqbal University College. The extended load models and numerical implementation are developed for this laboratory.

MPS · Uncontrolled Rectifiers
M. R. Al-ghazaly · Power Electronic, Lecture 1

Which phase supplies the load now?

Phase and output voltages

Output and phase-U currents

What to notice now

Guided investigations

Predict the conducting phase

Why 120°, not 180°?

Smooth current without smoothing voltage

Do three balanced phases cancel?

Count one diode drop

Highest phase, but no current?

Smoother voltage, sharper source current

Phase/diode currents and neutral return

Capacitor and resistor currents

Ripple and conduction

Instantaneous power

Voltage across D1

Power and source utilization

Electrical stress per diode

A phase current contains DC and harmonics

Connect this to the other rectifiers

Optional technical references

Voltage across D₁